The direct answer
Is L99BM114 relevant to humanoid and mobile-robot power systems? Yes—as a battery-monitoring and balancing IC, not as a complete BMS or battery. It monitors 4–14 series cells, includes parallel voltage acquisition and an 18-bit current channel, supports passive balancing and exposes isolated daisy-chain and SPI interfaces.
Do the public sources support a “near-zero error with zero latency” product conclusion? No. A four-author STMicroelectronics article shows two plotted current transients and describes close overlap. It does not publish raw traces, a numeric error statistic, active-load make/model, calibration record, sample rate or selected filter configuration. The datasheet also documents conversion and synchronization timing that must stay attached.
What is independently checked here? RCI identified the exact product and order code, hashed the 159-page DS14722 Rev 1 PDF, visually checked the relevant pages, extracted conditioned facts, counted the article’s public disclosures and compared its latency language with the datasheet. RCI performed no electrical test.
The responsible-party specification is detailed enough to screen the L99BM114 for a robot BMS design. The two public transient plots are useful manufacturer application evidence, but they cannot support an independent error, latency or humanoid-pack validation claim without the missing bench definition and raw data.
The exact model boundary
The responsible product surface is STMicroelectronics L99BM114; the product page lists order code L99BM114-TR. RCI catalogues that order code under the family name L99BM114. It is a TQFP-EP64 integrated circuit, not a pack, protection contactor, shunt, isolated-link implementation, charger or vehicle controller.
The audited datasheet is DS14722 Rev 1, July 2024, 159 pages. Its SHA-256 is 13514f854006c759bcc5858f50e852cbece3c1e9b769cb90685a4575f554b007. The official STEVAL-BMS114 board and its user manual provide an evaluation route, but the article does not identify that board as its humanoid-current bench.
Fourteen facts, with their conditions preserved
| Field | Published value | Condition | Evidence role | RCI boundary |
|---|---|---|---|---|
| series cell count | 4–14 cells | Per L99BM114 device | manufacturer-specification | Does not establish complete-pack architecture or pack voltage compatibility. |
| battery stack voltage | 64 V max | Headline device boundary | manufacturer-specification | Pin-level and application-circuit limits still govern. |
| cell voltage range | 0.1–5.0 V | VCELL electrical-characteristics interval | manufacturer-specification | Retain supply, temperature and acquisition conditions. |
| cell voltage resolution | 89 µV | Datasheet design information; not tested | manufacturer-design-information | ADC resolution is not system accuracy. |
| cell voltage accuracy plus drift | ±2 mV | VCELL 3.2–4.3 V; ambient −40 to +105°C | manufacturer-specification | Not a transient current-tracking metric. |
| current adc | 18-bit; ±150 mV differential input | Shunt-current channel | manufacturer-specification | System current range depends on shunt and analog design. |
| illustrative current range | ±1500 A | 0.1 mΩ shunt; application-only; not tested | manufacturer-application-illustration | Not a verified BMS, conductor, connector or robot-pack current rating. |
| current input error | ±0.3 mV within ±60 mV; ±0.5% outside to ±150 mV | Datasheet differential-input intervals and test conditions | manufacturer-specification | Requires shunt tolerance, temperature and full signal-chain uncertainty for system accuracy. |
| current conversion time | 328.25 µs typ. | Design information; not tested | manufacturer-design-information | Not an end-to-end controller or telemetry latency. |
| voltage filter window | 290 µs–148.48 ms | Programmable cell-voltage ADC filter selections | manufacturer-specification | Selected filter setting was not published for the two article plots. |
| synchronized sampling | On-demand voltage conversion waits for a useful current sample | Delay can extend to TCYCLEADC_CUR; synchronized current sample stored in CUR_INST_Synch | manufacturer-operating-description | This documented timing boundary prevents an unqualified zero-system-latency conclusion. |
| passive balance current | Up to 200 mA/cell | Junction-temperature and thermal limits apply | manufacturer-specification | Not a complete balancing-rate or pack thermal result. |
| communication | 2.66 Mbit/s isolated daisy chain; SPI up to 5 MHz; up to 31 devices | Manufacturer interface boundaries | manufacturer-specification | Does not establish system bus utilization, isolation implementation or fault recovery. |
| operating temperature | −40 to +105 °C ambient | Datasheet operating range | manufacturer-specification | Individual accuracy and thermal conditions still apply. |
Two labels deserve special care. The 89 µV cell-voltage resolution and 328.25 µs typical current-conversion time are marked as design information—not tested—in the datasheet table. The ±1500 A example is an application calculation using a 0.1 mΩ shunt; it is not a tested IC, board, connector, conductor or robot-pack current rating.
The ±2 mV cell-voltage figure applies to a stated 3.2–4.3 V interval and −40 to +105°C ambient range. It cannot be substituted for the article’s current-tracking error, whose numeric statistic is not published.
What the two transient plots actually disclose
| Direction | Reported step | Duration | Traces described | RCI evidence role |
|---|---|---|---|---|
| discharge | 250 A | 450 s | active-load reference / external INA path / L99BM114 AFE path | manufacturer-authored plotted claim |
| charge | approximately −135 A | 450 s | active-load reference / external INA path / L99BM114 AFE path | manufacturer-authored plotted claim |
The Power Systems Design article is by Giusy Gambino, Salvatore Cannavacciuolo, Andrea Botta and Luigi Di Turi, all identified with STMicroelectronics in Italy. RCI therefore classifies it as manufacturer-authored application evidence, even though it appears on a trade publication.
The article reports a 250 A discharge step and an approximately −135 A charge step, each over 450 seconds, and describes three overlaid traces: active-load reference, an external INA path and the L99BM114 AFE path. It describes the deviation qualitatively. RCI found no linked numeric residual, maximum error, RMS error, time-alignment rule or downloadable sample series.
Why RCI does not repeat “zero latency” without a qualifier
The manufacturer-authored article describes no software, phase or propagation latency in qualitative terms. The datasheet separately documents a typical current-conversion time of 328.25 µs as design information, programmable voltage-filter windows and an on-demand synchronization wait up to TCYCLEADC_CUR.
RCI does not call this a formal contradiction because the article does not publish the latency definition, reference point, resolution or acquisition configuration. It also does not repeat an unqualified zero-latency claim.
The article may be describing no visually observable separation at its plotted scale, while the datasheet describes IC-level acquisition behavior. Because the article does not define its measurement points, time resolution or filter configuration, the two statements are not directly comparable. The correct editorial result is an unresolved definition boundary, not a sensational contradiction or an unqualified zero.
The public reproduction package is incomplete
| Disclosure field | Public count | What it changes |
|---|---|---|
| Transient plots | 2 | Supports that plotted examples were reported. |
| Downloadable raw traces | 0 | No independent residual or timing recomputation. |
| Instrument make/model | 0 | Reference bandwidth, accuracy and timing remain undefined. |
| Calibration records | 0 | Reference traceability remains unknown. |
| Acquisition sample rate | 0 | Transient resolution and alignment cannot be reconstructed. |
| Published filter configuration | 0 | Datasheet filter-window options cannot be mapped to the plots. |
| Numeric transient-error metric | 0 | “Near-zero” remains qualitative. |
| Independent exact-model robot validation | 0 | No third-party exact-pack or operating-humanoid conclusion. |
A useful follow-up package would identify the active load and reference channel, publish calibration and shunt details, export timestamps and raw samples, disclose firmware and filter settings, define the latency reference points and calculate at least maximum absolute error, RMS error and time offset over each transient.
Facts can be audited without copying the article
ST’s terms of use restrict reproduction of site materials. The publisher page was marked all rights reserved when RCI checked it. A later Zenodo record declares CC BY 4.0 in metadata, but RCI did not establish the depositor’s authority or a rights chain that overrides the publisher page.
RCI therefore does not mirror the ST datasheet, journal-form PDF, tables or plots. This page publishes minimal factual observations, a document hash, disclosure counts and original commentary, with links to the responsible sources. The Zenodo license field is recorded as an unresolved rights signal—not treated as permission to republish.
Method and evidence labels
- Resolved the official product, exact order code, datasheet and evaluation-board surfaces.
- Downloaded DS14722 Rev 1, confirmed 159 pages, computed SHA-256 and visually inspected pages 1, 40, 44, 45.
- Extracted only conditioned facts and preserved entries explicitly marked design information or not tested.
- Read the complete public manufacturer-authored article, counted its plots and audited the presence or absence of eight reproduction fields.
- Compared article latency wording with datasheet conversion, filtering and synchronization behavior without forcing unlike definitions into one metric.
- Checked publisher, ST and Zenodo rights signals and chose no-mirroring treatment where the rights chain was not clear.
In the component catalog, the sixteen specification facts are labelled M for manufacturer-reported. Three missing public-evidence fields—raw traces, complete transient method and independent robot validation—are labelled U. No V independent-test claim is added for this IC.
Limits that stay attached
- RCI did not obtain or inspect the original bench data, instrument logs, firmware/configuration export or analysis code.
- The two plots are manufacturer-authored evidence and cannot be relabelled as independent exact-model validation.
- Datasheet design-information entries marked not tested remain manufacturer design information, not production-unit measurements by RCI.
- The L99BM114 is a monitoring IC, not a complete BMS, battery pack, protection system or humanoid power architecture.
- The exact public rights chain for the later Zenodo copy is unresolved; its metadata declaration is not used to override the publisher page.
- Public-source absence is bounded to the cited surfaces and verification date; a non-public test package may exist.
Download the evidence audit
Download the immutable JSON release and observation-level CSV. Stable aliases are current JSON and current CSV.
Suggested citation: Robot Component Index. “L99BM114 BMS Evidence: 159 Datasheet Pages, Two Transient Plots, Zero Raw Traces.” RCI 028, research dataset version 0.1.0, 2026-08-10. https://robotcomponentindex.com/research/l99bm114-bms-evidence-audit/