Production SoMs, a robotics development platform and rugged Jetson systems; module capability and system-exposed I/O remain distinct.
Comparison 04 · Audit sample
Robot main-compute platform evidence table
Compute modules and complete industrial systems compared beyond an unsupported single TOPS ranking.
TOPS values are precision-, sparsity- and workload-specific. Absence of a TOPS number is not zero AI capability.
| Field | NVIDIA Jetson AGX Orin 64GB | Raspberry Pi Compute Module 5 | Qualcomm Qualcomm Robotics RB5 Platform | Advantech MIC-733-AO | AAEON BOXER-8641AI | Seeed Studio reComputer Industrial J4012 | Toradex Verdin iMX8M Plus Quad 4GB WB IT | NVIDIA Jetson Orin NX 16GB | Raspberry Pi Compute Module 4 | Toradex Verdin AM62 Quad 2GB WB IT | AAEON BOXER-8651AI | NVIDIA Jetson Orin Nano 8GB | Qualcomm Robotics RB3 Platform | Advantech MIC-713-OX | AAEON BOXER-8646AI | Seeed Studio reComputer Mini J4012 | Toradex Verdin iMX95 Hexa 8GB WB IT |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| CPUCore architecture and clocks do not replace workload benchmarks. | 12-core Arm Cortex-A78AEMNo extra condition in selected source.Source ↗ | 4 × Cortex-A76 at 2.4 GHzMBroadcom BCM2712.Source ↗ | Kryo 585 up to 2.84 GHzMFour high-performance and four low-power cores are described in the brief.Source ↗ | UnknownNo adequate published value in the selected source set. | 8-core Cortex-A78AE (32 GB) / 12-core Cortex-A78AE (64 GB)MOrdered AGX Orin variant determines CPU configuration.Source ↗ | 8-core Arm Cortex-A78AE v8.2 64-bitMJetson Orin NX 16 GB configuration.Source ↗ | 4 × Cortex-A53 plus Cortex-M7MHeterogeneous SoC; clocks and workloads must be checked in the datasheet.Source ↗ | 8-core Arm Cortex-A78AE up to 2 GHzMProduction module configuration described by NVIDIA.Source ↗ | 4 × Cortex-A72 at 1.5 GHzMBroadcom BCM2711.Source ↗ | 4 × Cortex-A53 at 1.4 GHz; Cortex-M4F at 400 MHz; dual-core PRUSSMQuad 2GB variant.Source ↗ | 6-core Arm Cortex-A78AEMDatasheet configuration wording; verify ordered Jetson module revision.Source ↗ | 6-core Arm Cortex-A78AE up to 1.7 GHzMSuper-mode column.Source ↗ | 8-core Qualcomm Kryo 385 up to 2.8 GHzMPlatform product brief.Source ↗ | 8-core for 16 GB module / 6-core for 8 GB moduleMOrdering-dependent Orin NX configuration.Source ↗ | UnknownNo adequate published value in the selected source set. | UnknownNo adequate published value in the selected source set. | 6 × Arm Cortex-A55 up to 1.8 GHz; Cortex-M7 and Cortex-M33MSoC capability; module thermal limits still apply.Source ↗ |
| AI acceleration claimPreserves TOPS conditions or the vendor’s architectural description. | 275 INT8 sparse TOPSMVendor theoretical peak with sparsity; not an application benchmark.Source ↗ | UnknownNo adequate published value in the selected source set. | Hexagon 698 DSP with HVX and Tensor AcceleratorMThe cited brief does not state a directly comparable TOPS figure.Source ↗ | Up to 275 TOPSMMaximum advertised AGX Orin configuration; precision, sparsity and application conditions are not a system benchmark.Source ↗ | UnknownNo adequate published value in the selected source set. | 100 TOPSMVendor family-table value for J4012; not an application benchmark.Source ↗ | 2.3 TOPSMNXP i.MX 8M Plus NPU vendor figure; not an application benchmark.Source ↗ | 157 sparse / 78 dense TOPSMJetPack 6.2 Super mode; theoretical peak, not an application benchmark.Source ↗ | Not published in cited specificationURCI checked the cited official specification on the verification date.Source ↗ | UnknownNo adequate published value in the selected source set. | UnknownNo adequate published value in the selected source set. | 67 sparse / 33 dense INT8 TOPSMSuper mode with JetPack 6.2; sparsity and precision conditions preserved.Source ↗ | Hexagon 685 DSP and Adreno 630 GPUMNo single comparable TOPS claim is supplied in the cited brief.Source ↗ | Up to 157 TOPSCCurrent datasheet with Super mode and JetPack 6.2 or above; current product page still states up to 100 TOPS.Source ↗ | UnknownNo adequate published value in the selected source set. | 100 TOPSMProduct-guide value; not updated here to NVIDIA Super-mode figures.Source ↗ | 2 TOPSMNXP i.MX95 NPU headline; precision and workload conditions require model-level validation.Source ↗ |
| MemoryCapacity, bandwidth and ordered variant all matter. | 64 GB LPDDR5, 204.8 GB/sMProduction 64 GB module.Source ↗ | 2 / 4 / 8 / 16 GB LPDDR4-4267 with ECCMOrdered variant determines installed memory.Source ↗ | Up to 16 GB LPDDR5 / LPDDR4xMImplementation and board variant determine installed memory.Source ↗ | 32 or 64 GBMDepends on ordered AGX Orin system part number.Source ↗ | 32 or 64 GB LPDDR5MSoldered on the selected Jetson module.Source ↗ | UnknownNo adequate published value in the selected source set. | 4 GB LPDDR4 at 4000 MT/s; 32 GB eMMCM4 GB WB IT variant; eMMC vendor can change by hardware revision.Source ↗ | 16 GB LPDDR5, 102 GB/sMModule configuration.Source ↗ | 1 / 2 / 4 / 8 GB LPDDR4-3200MOrdered variant.Source ↗ | 2 GB LPDDR4 with inline ECCMQuad 2GB variant; inline ECC is an SoC feature.Source ↗ | 8 / 16 GB LPDDR5MOn selected Jetson module.Source ↗ | 8 GB 128-bit LPDDR5; 102 GB/sM8 GB module, Super-mode column.Source ↗ | 8 GB LPDDR4x at 1866 MHzMDevelopment-platform configuration.Source ↗ | 8 GB / 16 GBMOrdered Jetson Orin NX module.Source ↗ | 32 GB LPDDR5MIntegrated module configuration.Source ↗ | 16 GB LPDDR5MIntegrated Orin NX module.Source ↗ | 8 GBMExact Hexa 8GB WB IT configuration.Source ↗ |
| Camera I/OModule capability differs from carrier-exposed ports. | 16 MIPI CSI-2 lanes / 16 virtual channelsMModule interface capability; carrier routing determines exposed ports.Source ↗ | 2 × four-lane MIPI DSI/CSI-2 portsMCarrier-board routing and software configuration required.Source ↗ | 12 D-PHY or 18 C-PHY cameras; 7 concurrentMPlatform maximum stated by vendor; board routing and sensors constrain actual combinations.Source ↗ | 4-channel GMSL2 frame grabberMOptional IC-FG-4G2C1 module.Source ↗ | UnknownNo adequate published value in the selected source set. | UnknownNo adequate published value in the selected source set. | UnknownNo adequate published value in the selected source set. | UnknownNo adequate published value in the selected source set. | UnknownNo adequate published value in the selected source set. | 1 × 4-lane MIPI CSI-2MModule interface; carrier routing required.Source ↗ | UnknownNo adequate published value in the selected source set. | Up to 4 cameras; 8 virtual channels over 8 MIPI CSI-2 lanesMModule capability; carrier routing determines exposed connectors.Source ↗ | Spectra 280 ISP; up to 32 MP single or 16 MP dual cameraMSensor, mode and board routing constraints still apply.Source ↗ | 4 channelsMOptional expansion, not present in every ordered unit.Source ↗ | 12 × Gigabit Ethernet PoEMSystem ports; aggregate bandwidth and PoE budget require design review.Source ↗ | UnknownNo adequate published value in the selected source set. | Not published in cited specificationURCI checked the cited official specification on the verification date.Source ↗ |
| Power envelopeModule modes exclude some carrier and peripheral loads. | 15–60 WMConfigured module power modes; carrier and peripherals add system power.Source ↗ | UnknownNo adequate published value in the selected source set. | UnknownNo adequate published value in the selected source set. | 9–36 VDCMWhole-system input range; consumption depends on configuration and load.Source ↗ | 12 VDCMLockable DC jack; no single workload power figure is published in the selected table.Source ↗ | 12–24 VDCMSystem input; actual consumption depends on module power mode and peripherals.Source ↗ | 1.5–6.3 WMDatasheet approximation; workload, peripherals and carrier losses are additional.Source ↗ | 10–25 WMOriginal production modes; JetPack 6.2 adds higher Super modes.Source ↗ | UnknownNo adequate published value in the selected source set. | UnknownNo adequate published value in the selected source set. | 12–24 VDCMSystem input; workload consumption not stated in the selected table.Source ↗ | 15 W / 25 W / MAXN SUPERMJetPack 6.2 Super-mode configuration; carrier and peripherals are additional loads.Source ↗ | UnknownNo adequate published value in the selected source set. | 9–36 VDCMSystem input range.Source ↗ | 19–24 VDCMSystem input range.Source ↗ | UnknownNo adequate published value in the selected source set. | UnknownNo adequate published value in the selected source set. |
| Software baselineSupport windows and exact release compatibility require ongoing tracking. | NVIDIA JetPack / CUDA / IsaacMExact compatibility depends on JetPack and Jetson Linux release.Source ↗ | UnknownNo adequate published value in the selected source set. | Ubuntu 18.04; Yocto Dunfell; Linux 4.19; ROS 2MThis is the document’s published baseline, not proof of current distribution support.Source ↗ | UnknownNo adequate published value in the selected source set. | UnknownNo adequate published value in the selected source set. | UnknownNo adequate published value in the selected source set. | Torizon OS; Toradex Yocto reference images; AndroidMExact support status depends on release and hardware revision.Source ↗ | JetPack 6.2MRequired for the cited Super-mode table.Source ↗ | UnknownNo adequate published value in the selected source set. | UnknownNo adequate published value in the selected source set. | UnknownNo adequate published value in the selected source set. | JetPack 6.2MRequired for the cited Super-mode performance table.Source ↗ | Linux and ROS supportMVersion compatibility must be checked against current downloadable images.Source ↗ | UnknownNo adequate published value in the selected source set. | JetPack 5.0 or laterMManual baseline; exact image availability must be checked.Source ↗ | JetPack 6.0MGuide baseline; exact image and Super-mode support require current verification.Source ↗ | Torizon / Toradex BSP ecosystemMExact release support must be matched to module revision.Source ↗ |
Values are transcribed from the linked sources and were checked on the date shown by each record. V = independently verified; M = manufacturer claimed; D = RCI derived; C = conflicting; U = unknown.
Read the performance, power and lifecycle audit
RCI 018 separates eight production modules, two development platforms and seven complete systems. Nine records publish numeric TOPS, three state both precision and sparsity, and none publishes a product-specific software support end date. Open the robot edge-compute audit →
Interpretation rule
The condition belongs to the number.
RCI does not compute winners from this audit sample. The table’s purpose is to show what can be compared now, what requires a shared test, and which public fields are still missing.
Read the full method →