NXP i.MX RT1062 Cortex-M7 microcontroller board with USB, serial, SPI, I2C, CAN/CAN FD, PWM and mixed-signal I/O
Compute & Control · Microcontroller development board
Teensy 4.0
The exact real-time controller named by the OpenAMR responsibility-party component table, separated from the processor identity and from any flashed firmware or carrier wiring.
PJRC Teensy 4.0 · Also: TEENSY40, Teensy USB Board Version 4.0, Teensy 4.0 / NXP i.MX RT1062
What this record can support today.
Coverage is computed from published, non-unknown fields. It measures the record—not product quality—and makes missing procurement evidence explicit.
Engineering field coverage50%
5 of 10 selected fields published
- Official product sourcepublished
- Lifecycle statepublished
- Mechanical dimensions / mass / mountingmissing
- Environmental operating limitsmissing
- Compute performance boundarymissing
- Memory and storagepublished
- Power mode / inputpublished
- I/O and expansionpublished
- Software / OS supportmissing
- Thermal design boundarymissing
Procurement field coverage15%
2 of 13 selected fields published
- Official product / sales routepublished
- Lifecycle statepublished
- Exact orderable SKU / part numbermissing
- Price with region, currency and quantitymissing
- Lead time with check datemissing
- Commercial availability / stock statemissing
- Minimum order quantitymissing
- Authorized distributor / sales channelmissing
- CAD / STEP / interface drawingmissing
- Certification with identifiermissing
- MTBF / failure / reliability datamissing
- Warranty termsmissing
- PCN / EOL / replacement noticemissing
Coverage measures whether a selected public field is present with non-U evidence. It is not a product score, compatibility result, certification, availability confirmation or procurement recommendation. Download the complete readiness coverage JSON →
Exact-model responsibility-party BOM crosswalk.
This edge requires a pinned robot BOM identity and an exact RCI component record. It remains separate from as-built inspection, compatibility and performance evidence.
Robot BOM → exact component
OpenAMR multipurpose mobile platform
The pinned OpenAMR component table identifies one Teensy 4.0 and its NXP i.MX RT1062 processor. RCI separately represents the exact PJRC board; the processor is not promoted as a second installed board.
Published quantity: 1. One source-table unit is published. RCI did not inspect the board, processor marking, carrier wiring or flashed firmware.
Boundary: This is a public component-table identity relation, not proof of serial identity, firmware, electrical integration, real-time performance, endorsement or an RCI robot test.
1 bounded physical-evidence record.
Publisher independence, identity precision and measurement scope vary by row. Results remain bounded by the disclosed specimen, setup, workload and metric; an inconclusive mapping is evidence associated with the catalog model, not verification of a manufacturer claim.
| Measured result | Conditions | Claim mapping | Source |
|---|---|---|---|
| Independent CoreMark, power and temperature testindependent_coremark_power_test | CoreMark runs published with supply-current and temperature observationsPhysical Teensy 4.0 board under the author’s Arduino/CoreMark build, clock and cooling configurations. | inconclusiveThe board benchmark and power observations are physical exact-model evidence but do not validate the OpenAMR firmware or installed-board behavior. | Teensy CoreMark benchmark ↗Teensy 4.0 result, power and temperature tables Checked 2026-08-26 |
Reported values, conditions attached.
Evidence state describes the claim—not the prestige of the company or document.
| Claim | Reported value | Condition / boundary | State | Source |
|---|---|---|---|---|
| Processorprocessor | NXP i.MX RT1062; ARM Cortex-M7 at 600 MHz | Teensy 4.0 board specification. | M · Manufacturer claimed | PJRC Teensy 4.0 Development Board ↗Specifications, processor, pins, communication, timing, power and memory sections · Live product documentation observed 2026-08-13 Checked 2026-08-13 |
| Memorymemory | 1,984 KB flash; 1,024 KB RAM; 1,080-byte emulated EEPROM | Part of flash is reserved for recovery and EEPROM emulation. | M · Manufacturer claimed | PJRC Teensy 4.0 Development Board ↗Specifications, processor, pins, communication, timing, power and memory sections · Live product documentation observed 2026-08-13 Checked 2026-08-13 |
| USBusb | 480 Mbit/s USB device and USB host | Host signals use bottom SMT pads and require integration provisions. | M · Manufacturer claimed | PJRC Teensy 4.0 Development Board ↗Specifications, processor, pins, communication, timing, power and memory sections · Live product documentation observed 2026-08-13 Checked 2026-08-13 |
| Digital I/Odigital_io | 40 digital I/O pins; 31 PWM pins | Only 24 I/O are breadboard-accessible without bottom pads. | M · Manufacturer claimed | PJRC Teensy 4.0 Development Board ↗Specifications, processor, pins, communication, timing, power and memory sections · Live product documentation observed 2026-08-13 Checked 2026-08-13 |
| Analog inputsanalog_input | 14 pins | 3.3 V maximum; pins are not 5 V tolerant. | M · Manufacturer claimed | PJRC Teensy 4.0 Development Board ↗Specifications, processor, pins, communication, timing, power and memory sections · Live product documentation observed 2026-08-13 Checked 2026-08-13 |
| Serial interfacesserial_interfaces | 7 serial; 3 SPI; 3 I2C | Board-level peripheral counts. | M · Manufacturer claimed | PJRC Teensy 4.0 Development Board ↗Specifications, processor, pins, communication, timing, power and memory sections · Live product documentation observed 2026-08-13 Checked 2026-08-13 |
| CAN controllerscan | 3 CAN, including 1 CAN FD | An external CAN transceiver is required for the physical bus. | M · Manufacturer claimed | PJRC Teensy 4.0 Development Board ↗Specifications, processor, pins, communication, timing, power and memory sections · Live product documentation observed 2026-08-13 Checked 2026-08-13 |
| DMA channelsdma | 32 channels | General-purpose DMA channels. | M · Manufacturer claimed | PJRC Teensy 4.0 Development Board ↗Specifications, processor, pins, communication, timing, power and memory sections · Live product documentation observed 2026-08-13 Checked 2026-08-13 |
| I/O voltage boundarylogic_voltage | 3.3 V; not 5 V tolerant | Applies to digital and analog pins. | M · Manufacturer claimed | PJRC Teensy 4.0 Development Board ↗Specifications, processor, pins, communication, timing, power and memory sections · Live product documentation observed 2026-08-13 Checked 2026-08-13 |
| Approximate board currentnominal_current | 100 mA | Manufacturer statement for operation at 600 MHz; attached peripherals excluded. | M · Manufacturer claimed | PJRC Teensy 4.0 Development Board ↗Specifications, processor, pins, communication, timing, power and memory sections · Live product documentation observed 2026-08-13 Checked 2026-08-13 |
| OpenAMR flashed-firmware digestopenamr_firmware_digest | Not published in cited public evidence | RCI checked the cited official public evidence on the verification date.The product page does not identify the exact firmware image or configuration used by one OpenAMR build. | U · Unknown | PJRC Teensy 4.0 Development Board ↗Specifications, processor, pins, communication, timing, power and memory sections · Live product documentation observed 2026-08-13 Checked 2026-08-13 |
| Independent OpenAMR controller validationindependent_openamr_validation | Not published in cited public evidence | RCI checked the cited official public evidence on the verification date.RCI has not inspected the board, wiring, firmware, timing behavior or a powered OpenAMR system. | U · Unknown | PJRC Teensy 4.0 Development Board ↗Specifications, processor, pins, communication, timing, power and memory sections · Live product documentation observed 2026-08-13 Checked 2026-08-13 |
Known limits
What this record does not prove.
- Peripheral-controller presence does not include external transceivers, power conditioning, wiring or application protocol.
- The OpenAMR relation is one public component-table row, not a serialised as-built or compatibility claim.
- RCI has not powered or benchmarked this board in OpenAMR.